instruction execution

英 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

美 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

网络  指令执行

计算机

英英释义

noun

• (computer science) the process of carrying out an instruction by a computer
  Synonym:execution

双语例句

• The platform introduces two memory system structure, addressing mode simulation guarantees that not only the operand is correctly obtained, but also the instruction execution time is correctly calculated.
  采用了两种存储器体系结构，寻址方式的模拟不仅保证了正确地确定操作数，而且能够正确统计指令执行时间。
• In other words, software interrupts always occur at the beginning of an instruction execution cycle.
  换句话说，软件中断常常在指令运行周期的开始。
• In the instruction execution pipeline stage, scalable pipeline technology was adopted to realize the video processing instruction.
  为有效实现扩展指令，处理器执行级采用了可扩展流水级技术。
• Propose the run time dispatched instruction decoder and issue logic based on instruction execution cycle.
  提出基于指令类型动态分配的译码器设计方案和基于指令执行周期的动态逻辑发射方案。
• Compile the assembler into machine code so that generate PLE file in order to implement the execution mechanism of PLC virtual machine. In this way, the instruction execution speed of PLC is greatly increased and we can save much memory.
  用汇编编译器编译转变成功的汇编程序产生机器码，从而构造出可执行文件&PLE文件，实现PLC虚拟机的机器码执行机制，这样大大提高了PLC指令的执行速度，同时大大节约了内存空间。
• This thesis sets forth case instruction in terms of executive condition, organizing execution and realistic meaning and so on.
  文中从案例教学法的实施条件、组织实施过程、现实意义等方面进行了阐述。
• It is more efficient to design a simple instruction set that enable the execution of one instruction per clock cycle.
  设计一个能够在一个时钟周期执行一条指令的简单指令系统才是更有效的。
• In the traditional Cache, the Cache hit ratio is insured only by the address locality of memory reference instruction stream during program execution, it restricts the improvement of Cache hit ratio.
  在传统的Cache中，仅仅依靠程序执行时访存指令流地址的局域性来保证较高的Cache命中率，使得Cache命中率的提高受到限制。
• Pipeline is dealing with instruction, including instruction decode, issue, and execution.
  流水线正在处理指令，包括指令解码、发布和执行。
• As the core of SOC, CPU ′ s performance is mostly determined by instruction ′ s execution efficiency. Pipeline increases the instruction ′ s execution pace and improves the CPU ′ s performance.
  作为SOC的核心，CPU的性能主要取决于指令的执行效率，而采用流水线方式大大增加了指令的执行速度，提高了CPU的性能。